Digital Processing Lab - Indian Institute of Technology, Chennai

-Research assistant, Mar 2006-June 2007

As a part of the VLSI group, the Digital Processing lab (which houses the FPGA Lab) carries out research focused on developing high quality implementations of signal processing systems. The main targets are error-correcting codes, as they require high throughput and have fair amounts of computational complexity, but also involve quite a lot of bit-level manipulation.

I have worked under Prof. S. Srinivasan and  Dr. Ramachandran on several FPGA implementation projects.

  • Design and Implementation of Integer Transform and Quantization Processor
 This project was aimed at a novel implementation of the core processors, the integer transform and quantization, and the inverse for H.264 video codec using a single FPGA. 
  •  Design and FPGA Implementation of Camera and Display Interface for H.264

Built a complete video conversion shell that processed NTSC analog composite, component and S-video source signal. The application set up the source signal for further processing by providing multiple digital formats (4:2:2YCrCb, 4:4:4YCrCb and RGB) as outputs.


DSP Learning Center - Analog Devices Inc. & Indian Institute of Technology, Chennai

 Jan 2006- Mar 2006

I worked on the implementation of several DSP applications on the Analog Devices Blackfin Processor.  These included Speech Coding Algorithms, Image enhancement such as de-bluring and adaptive equalization.

 This experience prompted me to explore the use of reconfigurable computing platforms to implement DSP applications. I met Prof. Srinivasan whose research team was working on FPGA implementations. So i guess this was the starting point for my current research direction.


Security Considerations of the AODV Protocol for use in Mobile Ad-Hoc Networks- St. Joseph's College, Chennai

 Jul 2005- Dec 2005

I worked under Asst. Prof. J.Martin Leo Manickam on the Security considerations of the AODV protocol. Specifically, security issues that arise when an authenticated node in the network suddenly turns hostile. I was involved in simulating possible attacks that a node could carry out. For example, a hostile node could arbitrarily assign lowest hop-count to all messages coming through it and thereby route all traffic through itself.

I had great fun on this project. Most of this is still in the theoretical domain. I would at some point like to work on actual implementations of Mobile Ad Hoc Networking protocols. As Someone working in the reconfigurable device space, I am convinced that a coarse-grained reconfigurable device is the optimum platform for such an application. Please get in touch with me if you are interested in collaborating on such a research initiative.